1. Field of the Invention
This invention relates to a semiconductor device, and more particularly to a semiconductor device having the superjunction structure.
2. Background Art
Vertical MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) suitable for power electronics application have been conventionally known. The on-resistance of this MOSFET greatly depends on the electric resistance of the conduction layer (drift layer). The resistance can be decreased by increasing the impurity concentration of the drift layer. However, the increase of impurity concentration is restricted for ensuring a desired breakdown voltage. That is, there is a tradeoff between the device breakdown voltage and the on-resistance. Improving this tradeoff is important for low power consumption devices.
As an example MOSFET improving the tradeoff, a MOSFET having a structure called the superjunction structure is known, where p-type pillar regions and n-type pillar regions are provided in parallel in the drift layer. See, e.g., U.S. Pat. No. 6,081,009 (FIG. 3). In this structure, a non-doped layer is artificially produced by equalizing the amount of impurities contained in the p-type pillar region and the n-type pillar region. While maintaining high breakdown voltage, a current is allowed to flow through the n-type pillar region doped with high concentration. Thus a device with low on-resistance over the limit of the material is realized.
In this superjunction structure, the period of the superjunction structure (the period of repetition of the p-type pillar region and the n-type pillar region) needs to be decreased for increasing the amount of impurities in the p-type and n-type pillar region to reduce the on-resistance. If the amount of impurities in the p-type and n-type pillar region is increased without decreasing the period, the lateral electric field for completely depleting the superjunction structure is increased, and the vertical electric field determining the breakdown voltage is decreased. Thus the period of the superjunction structure needs to be decreased for reducing the on-resistance while maintaining high breakdown voltage.
When the superjunction structure is arranged in the same direction and at the same period as the overlying MOS gate structure, decreasing the period of the superjunction structure entails downsizing of the MOS gate structure. The downsizing of the MOS gate structure leads to a significant change of process and a decrease in process margin.
The '009 patent also discloses the superjunction structure and the MOS gate structure extending orthogonal to each other in a striped configuration. In such configuration, the period of the superjunction structure can be made different from the period of the MOS gate structure.
However, in such configuration, electrons injected from the channel into the n-type pillar region spread and flow below the base region. This lateral spreading resistance causes a problem of increased on-resistance.